A high-speed voltage-mode sense amplifier for SRAM

This paper reports a novel sense amplifier (SA) suitable for voltage sensing in the read operation of static random access memory (SRAM). Contrary to the conventional cross-coupled SA, an NMOS cross coupling amplifier is added as the second stage amplifier and the pull-up and pull-down circuits are added as the output circuit. The proposed structure can quickly amplify the bit line voltage difference with high gain, improve the sensitivity, and ensure that the data output port of the SRAM encounters no interference when the utility model is not working. The simulation results show that this design reduces 95% of the voltage required for the bit lines to guarantee the full swing at output nodes and shortens 80% of the sensing delay for the same input voltage difference compared with the conventional SA.