A multiprocessor architecture supporting dynamic partial reconfiguration

The intrinsic characteristics of embedded applications such as diversity and variability, together with their stringent requirements for computing performance, impose significant challenges on embedded system design. By providing a hardware/software co-design flow, an underlying communication interface, a parallel programming model and the relevant runtime environment, dynamic partial reconfigurable computing (DPR) technology was presented for service-oriented multiprocessor (SOMP) system. The DPR technology can effectively improve the system flexibility without performance loss, enabling the system to satisfy the requirements of more diverse embedded applications. An SOMP prototyping system has been implemented on the development board for the Xilinx Virtex-5 FPGA. A series of experiments were conducted and the results demonstrate the correctness and the resulting flexibility of the proposed architecture.